The electronics industry has experienced an ever increasing demand for smaller and faster electronic devices which are simultaneously able to support a greater number of increasingly complex and sophisticated functions. Accordingly, there is a continuing trend in the semiconductor industry to manufacture low-cost, high-performance, and low-power integrated circuits (ICs). Thus far these goals have been achieved in large part by scaling down semiconductor IC dimensions (e.g., minimum feature size) and thereby improving production efficiency and lowering associated costs. However, such scaling has also introduced increased complexity to the semiconductor manufacturing process, as well as to the design and simulation of such processes.
In some cases, simulated devices and/or circuits of early stage technologies may not always be entirely correct, for example, as design and/or manufacturing issues are being refined. Measurements, both simulated and physically measured, are an indispensable part of a technology qualification process. However, such measurements can be expensive (e.g., in terms of time and money). Thus, in some cases, a measurement data sample size may not be large enough to successfully employ statistical methods for data correction. Additionally, data correction techniques become even more challenging when dealing with measurements which are dependent on a plurality of measurement parameters, where each parameter exhibits its own trend. As one example, existing methods may require construction of sorted arrays requiring an excessive amount of time-consuming data accesses. In another example, costly manual data correction may need to be employed. Thus, existing data sorting and correction techniques have not been entirely satisfactory in all respects.